Government Pushes Semiconductor Design Innovation

On 22nd August 2025, the Government of India announced the sanctioning of 23 chip-design projects under the Design Linked Incentive (DLI) Scheme to strengthen the nation’s semiconductor design ecosystem.

Key Points

DLI Scheme Implementation: Supports domestic chip design by providing financial incentives, access to EDA tools, and mentorship to startups and MSMEs.
Vervesemi Microelectronics’ Roadmap:
- BLDC Controller ASIC: Under the MeitY-supported Chips to Startup (C2S) Programme for small motor applications such as fans and appliances; samples expected in 2026.
- Precision Motor-Control ASIC: Recognized under DLI, targeting EVs, drones, and industrial automation; sampling in 2026.
- Multifunction Data Acquisition ASIC: Designed for space and avionics, powered by ML for mission-critical aerospace applications; samples in 2026.